Job Description

Description

At Xilinx, we are leading the industry transformation to build an adaptable, intelligent world. ARE YOU bold, collaborative, and creative? We develop leaders and innovators who want to revolutionize the world of technology. We believe that by embracing diverse ideas, pushing boundaries, and working together as ONEXILINX, anything is possible.
Our culture of innovation began with the invention of the Field Programmable Gate Array (FPGA), and with the 2018 introduction of our Adaptive Compute Acceleration Platform (ACAP), has made a quantum leap in capability, solidifying our role as the adaptable platform supplier of choice. From the beginning, we have always believed in providing inventors with products and platforms that are infinitely adaptable. From self-driving cars, to world-record genome processing, to AI and big data, to the world's first 5G networks, we empower the world's builders and visionaries whose ideas solve every day problems and improve people's lives.
If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care deeply about creating significant development experiences while building a strong sense of belonging and connection. We champion an environment of empowered learning, wellness, community engagement, and recognition, so you can focus on work that matters - world class technology that improves the way we live and work. We are ONEXILINX.

Xilinx is currently looking for a dynamic individual to work within the Processor Systems Design and Verification Group on the next-generation SOC ASIC design. The individual will manage and contribute to the architecture and implementation of the verification test bench using System Verilog and UVM. This individual will work closely with designers to develop a testplan and a stand-alone methodology that is easily portable and reusable within the system testbench. The individual needs to work with teams who are in different geographical areas.

Responsibilities include the following:

Important Information. Vivado Lab Edition is a compact, and standalone product targeted for use in the lab environments. It provides for programming and logic/serial IO debug of all Vivado supported devices.

· Work with Architecture, design, emulation and application teams and contribute to the verification of the next generation of SoC

• Xilinx brings exposure, relationships, and secular power for AMD in networking, acceleration (great inferencing positioning) and storage growth vectors, edge strength, and, importantly.
• Xilinx is the only (as of 2007) FPGA vendor to distribute a native Linux freeware synthesis toolchain. Xilinx announced the architecture for a new ARM Cortex-A9-based platform for embedded systems designers, that combines the software programmability of an embedded processor with the hardware flexibility of an FPGA.
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• Xilinx is the inventor of the FPGA, programmable SoCs, and now, the ACAP. Xilinx delivers the most dynamic processing technology in the industry.

· Play a key role in the development of verification environemnt in System Verilog/UVM

· Verify the architecture and performance of the design

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· Work with Architecture and Emulation teams to ensure micro-architecture and design is fully verified/validated

· Develop comprehensive verification plan and drive the implementation of verification test cases, measure code coverage

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Skill sets

· Strong analytical problem solving, and attention to details

· Strong experience in HDL, verification, and general computational logic design/verification concepts

· Expertise in Verilog/System Verilog, UVM, Scripting languages like Perl/Python, etc.

· Excellent written and verbal communication skills

· Excellent interpersonal skills, self-motivated

· Knowledge on ARM processor is a plus

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Education Requirements : B.E or M.Tech
Years of Experience : 3 years